Synopsys and TSMC have partnered to accelerate the development of next-generation AI chips and multi-die designs.

Cadence (CDNS) announced major advancements in chip design automation and IP, driven by its long-standing relationship with TSMC (TSM) to develop ...

Learn real-world strategies about FPGA Chip Design, Join Elektor Engineering Insights on Sept 24 at 16:00 CEST with Kevin ...

Launching a pilot 'chip design to tapeout' flow curriculum, enabling academic institutions with industry-aligned coursework. Pilot testing underway at over 40 select worldwide universities with intent ...

Innovations in assistive AI and, ultimately, increased autonomy with agentic AI will redefine what engineers can achieve within the chip design cycle. Assistive AI: Improving chip design workflows.

Learn real-world strategies about FPGA Chip Design, Join Elektor Engineering Insights on Sept 24 at 16:00 CEST with Kevin ...

The physics of transistors and politics of trading licenses are colliding on the AI frontier Analysis Few of us would have ...

Though the process of designing a chip using open-source tools may seem daunting at first, it’s an invaluable learning experience and can lead to creation of foundational chips like Silicluster.

Microsoft says it has developed a breakthrough microfluidics cooling system for chips, resembling the veins in a leaf and ...

Programmable photonics devices, which use light to perform complex computations, are emerging as a key area in integrated ...

Microsoft says it may have found a better way to keep future AI chips cool, and it involves letting coolant flow right ...